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Non-standard ANSI port definition #924
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Hmm, I could add this but even VCS 2021.09 says this:
So it seems you're going to need to fix your code at some point anyway when VCS gets around to making this an error. Is that not possible? Are you planning on staying on an old VCS version forever? |
Thanks for your reply. |
Ok, I am not against adding a compatibility flag for this, but it's also not at the top of my priority list at the moment. |
Added in 895805e |
Is your feature request related to a problem? Please describe.
According to the SystemVerilog standard, this code should report error, but both VCS and Cadence support this syntax.
Describe the solution you'd like
Under the
--compat vcs
option, this syntax is supported, otherwise an error will occur.This feature has been widely used in previous code, so I really look forward to suporting it, thanks.
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