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It leverages the `SVD` library to parse CMSIS SVD files,\r\nenabling you to interact with device registers by name rather than raw\r\nmemory addresses and values.\r\n\r\nExample uses of SVD2LLDB:\r\n\r\n1. Load the SVD file corresponding to the target device:\r\n\r\n  ```console\r\n  (lldb) svd load ~/Downloads/STM32F7x6.svd\r\n  Loaded SVD file: “STM32F7x6.svd”\r\n  ```\r\n\r\n2. Read the value of a hardware register using its name:\r\n\r\n  ```console\r\n  (lldb) svd read GPIOA.MODER\r\n  GPIOA.MODER: 0x2800_0000\r\n  ```\r\n\r\n3. Modify the value of a hardware register using its name:\r\n\r\n  ```console\r\n  (lldb) svd write GPIOA.MODER 0x12345678\r\n  GPIOA.MODER: 0x12345678\r\n  ```\r\n\r\n4. Decode the value `0x0123_4567` for register `TIMER0.CR` with a visual\r\ndiagram:\r\n\r\n  ```console\r\n  (lldb) svd decode TIMER0.CR 0x0123_4567 --visual\r\n  TIMER0.CR: 0x0123_4567\r\n\r\n                        ╭╴CNTSRC  ╭╴RST\r\n    ╭╴S   ╭╴RELOAD╭╴CAPEDGE  ╭╴MODE\r\n    ┴     ┴─      ┴─    ┴─── ┴──  ┴\r\n  0b00000001001000110100010101100111\r\n        ┬─    ┬─    ┬───    ┬   ┬─ ┬\r\n        ╰╴IDR ╰╴TRGEXT      ╰╴PSC  ╰╴EN\r\n                    ╰╴CAPSRC    ╰╴CNT\r\n\r\n  [31:31] S       0x0 (STOP)\r\n  [27:26] IDR     0x0 (KEEP)\r\n  [25:24] RELOAD  0x1 (RELOAD1)\r\n  [21:20] TRGEXT  0x2 (DMA2)\r\n  [17:16] CAPEDGE 0x3\r\n  [15:12] CAPSRC  0x4 (GPIOA_3)\r\n  [11:8]  CNTSRC  0x5 (CAP_SRC_div32)\r\n  [7:7]   PSC     0x0 (Disabled)\r\n  [6:4]   MODE    0x6\r\n  [3:2]   CNT     0x1 (Count_DOWN)\r\n  [1:1]   RST     0x1 (Reset_Timer)\r\n  [0:0]   EN      0x1 (Enable)\r\n  ```\r\n\r\nSVD2LLDB is hidden behind a feature flag as it requires LLDB.framework\r\nheaders to build which are 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It leverages the `SVD` library to parse CMSIS SVD files,\nenabling you to interact with device registers by name rather than raw\nmemory addresses and values.\n\nExample uses of SVD2LLDB:\n\n1. Load the SVD file corresponding to the target device:\n\n  ```console\n  (lldb) svd load ~/Downloads/STM32F7x6.svd\n  Loaded SVD file: “STM32F7x6.svd”\n  ```\n\n2. Read the value of a hardware register using its name:\n\n  ```console\n  (lldb) svd read GPIOA.MODER\n  GPIOA.MODER: 0x2800_0000\n  ```\n\n3. Modify the value of a hardware register using its name:\n\n  ```console\n  (lldb) svd write GPIOA.MODER 0x12345678\n  GPIOA.MODER: 0x12345678\n  ```\n\n4. Decode the value `0x0123_4567` for register `TIMER0.CR` with a visual\n   diagram:\n\n  ```console\n  (lldb) svd decode TIMER0.CR 0x0123_4567 --visual\n  TIMER0.CR: 0x0123_4567\n\n                        ╭╴CNTSRC  ╭╴RST\n    ╭╴S   ╭╴RELOAD╭╴CAPEDGE  ╭╴MODE\n    ┴     ┴─      ┴─    ┴─── ┴──  ┴\n  0b00000001001000110100010101100111\n        ┬─    ┬─    ┬───    ┬   ┬─ ┬\n        ╰╴IDR ╰╴TRGEXT      ╰╴PSC  ╰╴EN\n                    ╰╴CAPSRC    ╰╴CNT\n\n  [31:31] S       0x0 (STOP)\n  [27:26] IDR     0x0 (KEEP)\n  [25:24] RELOAD  0x1 (RELOAD1)\n  [21:20] TRGEXT  0x2 (DMA2)\n  [17:16] CAPEDGE 0x3\n  [15:12] CAPSRC  0x4 (GPIOA_3)\n  [11:8]  CNTSRC  0x5 (CAP_SRC_div32)\n  [7:7]   PSC     0x0 (Disabled)\n  [6:4]   MODE    0x6\n  [3:2]   CNT     0x1 (Count_DOWN)\n  [1:1]   RST     0x1 (Reset_Timer)\n  [0:0]   EN      0x1 (Enable)\n  ```\n\nSVD2LLDB is hidden behind a feature flag as it requires LLDB.framework\nheaders to build which are not always available, see documentation for\ndetails on how to build the plugin.\n\nAdditionally this commit includes some improvements internal integer\nparsing and printing logic.","shortMessageHtmlLink":"Add SVD2LLDB LLDB plugin"}},{"before":null,"after":"5b69d375efad48b9fd0b4a557134f6e5c34dce4a","ref":"refs/heads/update-ci","pushedAt":"2024-05-25T18:58:31.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"rauhul","name":"Rauhul Varma","path":"/rauhul","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/9739930?s=80&v=4"},"commit":{"message":"Update CI to Swift 5.10 stable\n\nUpdates the CI Docker file to use the stable release of Swift 5.10\ninstead of the nightly build.","shortMessageHtmlLink":"Update CI to Swift 5.10 stable"}},{"before":"5b69d375efad48b9fd0b4a557134f6e5c34dce4a","after":"a3ca58cc2f8688ef8868ede1c358a8737426fade","ref":"refs/heads/main","pushedAt":"2024-05-25T18:57:52.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"rauhul","name":"Rauhul Varma","path":"/rauhul","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/9739930?s=80&v=4"},"commit":{"message":"Unconditionally build and test MMIOInterposable (#99)\n\nHopefully improve CI times by building and testing MMIO and\r\nMMIOInterposable in one invocation of swift-test instead of two. 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