Error coremark benchmark as workload on gem5

[WaseemEng]

command i run :./build/RISCV/gem5.opt ./configs/example/se.py -c tests/test-progs/hello/bin/riscv/linux/coremark.bare.riscv

[robhau]

Is coremark.bare.riscv a program written by you? I only have hello in tests/test-progs/hello/bin/riscv/linux/.

It seems that you try to access the mstatus register in usermode. However, mstatus is only accessible in machine mode. I suggest you to take a look into the RISC-V specification (privileged architecture).

I have no experience with SE mode, since I do only full system simulation. However, I guess that in SE mode, you are only in the user mode, since the OS is emulated by your host computer. Therefore, you will never be able to access mstatus in SE.

[WaseemEng]

Yes, You are saying right @robhau I have find this is only way that if I run gem5 in Full system mode then I can access the mstatus in the machine mode. @robhau can you give me full_system python script and which command you are running.

[robhau]

You can find a minimal working bare metal example here: https://github.com/robhau/gem5/blob/minor_cpu_bug_minimal_working_example/configs/control_hazard.py (It is very simple because of its purpose)

[WaseemEng]

No I have downloaded it from the git repo and then i generate the hex file using the toolchain and then run ingem5 as a workload.

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On Thu, May 16, 2024 at 1:16 PM Robert Hauser ***@***.***> wrote: Is coremark.bare.riscv a program written by you? I only have hello in tests/test-progs/hello/bin/riscv/linux/. — Reply to this email directly, view it on GitHub <#1132 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/BCCAVRRAFRINUQ5AEQS7L4DZCRTNRAVCNFSM6AAAAABHWKBESGVHI2DSMVQWIX3LMV43SRDJONRXK43TNFXW4Q3PNVWWK3TUHM4TINJUHAYDE> . You are receiving this because you authored the thread.Message ID: ***@***.***>

[robhau]

I suggest you this tutorial for RISC-V bare metal programming.

[WaseemEng]

Thanks a lot. I am going to see this tutorial and let you know.Thank you

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On Fri, May 17, 2024 at 11:19 AM Robert Hauser ***@***.***> wrote: I suggest you this tutorial <https://five-embeddev.com/baremetal/intro/> for RISC-V bare metal programming. — Reply to this email directly, view it on GitHub <#1132 (reply in thread)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/BCCAVRRJNMZDNM7OIVV5V3DZCWOPFAVCNFSM6AAAAABHWKBESGVHI2DSMVQWIX3LMV43SRDJONRXK43TNFXW4Q3PNVWWK3TUHM4TINRWGIYTQ> . You are receiving this because you authored the thread.Message ID: ***@***.***>