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[Arc] Add basic assertion support #6810
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Please assign me. |
I will share what I have noticed till now:
for this part, I am thinking of adding |
That sounds like a great idea! Take a look at the https://github.com/llvm/circt/blob/main/lib/Dialect/Arc/Transforms/LowerArcsToFuncs.cpp file to see how you can setup a bunch of conversion patterns and then run them on the IR. You probably want to run your conversion patterns as the very first thing in the |
What is the difference between patterns in this file and ones in
Yes, that is what I thought of. BTW, we discussed this issue on
The reason for the second idea is that Please share your thoughts. |
I like the idea of that Moxinilian guy. I think you can do all this by just adding one pattern in the Arc to LLVM conversion. The assertion will end up at the end of the |
The tricky thing is that assertions interact with a clock: |
I'm wondering if it makes sense to restrict this first task to only In a follow-up step, we could look at lowering the LTL dialect to an automaton. If I understand correctly, the assert should then trigger when a certain state in the automaton is reached, which can be indicated by an @fabianschuiki I'm not quite sure why |
Could you detail in what way clocks need to be processed differently than any other value? |
Take The way arcilator does its thing is by creating separate functions for each clock. So instead of having each op have a clock operand, the clocking is expressed as control flow through the op being listed inside a clock function. This means registers get translated as following: // initial
%x = seq.compreg %nextValue, %clock
// arc conversion
%x = arc.state @ComputeNextValue(...) clock %clock
// clock grouping (in lower states I think)
%0 = detected posedge on %clock
arc.clock_tree %0 {
%x = arc.state @ComputeNextValue(...) // no more clock operand
}
// clock function extraction
func.func @RocketClock() {
%x = arc.state @ComputeNextValue(...)
}
arc.trigger_clock @RocketClock() // or similar Because Arcilator wants to create a simulation model, clocks get turned into function calls. This also means that ops which have clocks must be transformed in that pipeline, from an initial representation with a clock to a later immediate representation without a clock. For asserts, this would look similar to the following: // initial
sv.assert.concurrent %clock, %condition
// arc conversion (option 1)
arc.assert %condition clock %clock
// arc conversion (option 2)
%0 = ltl.clock %clock, %condition
verif.assert %0
// clock grouping
%1 = detect clock edge
arc.clock_tree %1 {
// option 1
arc.assert %condition // without clock
// option 2
verif.assert %condition // without clock
} Using |
I think I need to spend some time looking at what arcilator does before the backend because I fail to understand the point of doing all this lol |
What is the difference between patterns in this file and ones in |
There is no difference (except the content of the |
If they both lower to LLVM, why splitting them? |
These do slightly different things: circt/lib/Dialect/Arc/Transforms/LowerArcsToFuncs.cpp Lines 45 to 46 in bea8510
ArcToLLVM conversion then takes these standard MLIR functions, along with all the other arc ops, and converts them to LLVM. This intermediate step with func.func allows us to reason about functions at an intermediate level, no longer arc-specific, but also not totally lowered to LLVM yet.
|
this is the definition of
If this is fine, our implementation will have 2 steps:
|
Add support for
verif.assert
andsv.assert.concurrent
operations to the Arc dialect and passes. When lowering towards LLVM, the asserts should lower to anscf.if
operation that checks whether their condition holds, and if it does not, calls a callback function (or aborts with a message for starters).This is likely to uncover a lot of details about how clocked and unclocked asserts need to be handled, and where they have to be scheduled and checked in the simulation model.
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