{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":521075862,"defaultBranch":"main","name":"clangir","ownerLogin":"llvm","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2022-08-04T00:48:51.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/17149993?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1714585510.0","currentOid":""},"activityList":{"items":[{"before":"a37440ddb39dcb34f43a21a27efc6256ca4f6b08","after":"cda4ef543a352e30155b23874088ea53c57ae83b","ref":"refs/heads/main","pushedAt":"2024-05-30T23:11:55.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Add CIRGen for binary fp2fp builtin operations (#616)\n\nThis PR adds the following operations for the builtin binary fp2fp\r\nfunctions:\r\n\r\n  - `cir.copysign` for `__builtin_copysign`;\r\n  - `cir.fmax` for `__builtin_fmax`;\r\n  - `cir.fmin` for `__builtin_fmin`;\r\n  - `cir.fmod` for `__builtin_fmod`;\r\n  - `cir.pow` for `__builtin_pow`.\r\n\r\nThis PR also includes CIRGen support for these new operations.","shortMessageHtmlLink":"[CIR][CIRGen] Add CIRGen for binary fp2fp builtin operations (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2304505484\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/616\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/616/hovercard\" href=\"https://github.com/llvm/clangir/pull/616\">#616</a>)"}},{"before":"de5d46891f877e1a0295e55bea7c0f1dea6b6846","after":"a37440ddb39dcb34f43a21a27efc6256ca4f6b08","ref":"refs/heads/main","pushedAt":"2024-05-30T23:08:41.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][Passes] Add CallConvLowering pass skeleton (#642)\n\nThis patch adds a new CallConvLowering pass that aims to lower the\r\ncalling conventions of the functions in the module. It also includes a\r\nnew Clang command line option to enable it. Also, it is considered a\r\npart of the lowering prepare set of passes, as it is unlikely to be used\r\nelsewhere in the pipeline.\r\n\r\nSince this will be dealing with ABI/Target-specific information, it\r\nrequires AST info. For this reason, it can only be executed through the\r\nclang driver or cc1 tool for now as CIR does not encode AST info.\r\n\r\nThis pass is disabled by default and can be enabled by passing the flag\r\n`-fclangir-call-conv-lowering`. Once this pass is more mature, it should\r\nbe enabled by default as a required step to lower to LLVM Dialect.","shortMessageHtmlLink":"[CIR][Passes] Add CallConvLowering pass skeleton (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2326537491\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/642\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/642/hovercard\" href=\"https://github.com/llvm/clangir/pull/642\">#642</a>)"}},{"before":"f931572ad3fe353f661550caf27a707b58d83d8c","after":"cec64bb1b4a7cf2444f58273dbb7a6848021d8d2","ref":"refs/heads/gh-pages","pushedAt":"2024-05-30T02:48:24.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"Fix pdf link in README.md (#635)\n\nThis link was broken on https://llvm.github.io/clangir/","shortMessageHtmlLink":"Fix pdf link in README.md (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2322541461\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/635\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/635/hovercard\" href=\"https://github.com/llvm/clangir/pull/635\">#635</a>)"}},{"before":"9fb9e7f954e7d9418077eb5297c8130ffc75618a","after":"de5d46891f877e1a0295e55bea7c0f1dea6b6846","ref":"refs/heads/main","pushedAt":"2024-05-29T21:54:48.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Honor alignment for createAlignedStore","shortMessageHtmlLink":"[CIR][CIRGen] Honor alignment for createAlignedStore"}},{"before":"eaae025754b5c58f2ede4787d328d79a0a671b94","after":"9fb9e7f954e7d9418077eb5297c8130ffc75618a","ref":"refs/heads/main","pushedAt":"2024-05-29T21:41:02.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Honor alignment on createAlignedLoad\n\nOne more step into fixing overall alignment requirements.","shortMessageHtmlLink":"[CIR][CIRGen] Honor alignment on createAlignedLoad"}},{"before":"9e87cfc1495c3a8e5c992571e7b01f56190df10d","after":"eaae025754b5c58f2ede4787d328d79a0a671b94","ref":"refs/heads/main","pushedAt":"2024-05-29T06:43:25.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR] Add C source code as comments in for.cir unit test (#625)\n\nWith C source code, we would able to update the CIR tests when needed.","shortMessageHtmlLink":"[CIR] Add C source code as comments in for.cir unit test (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2314215547\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/625\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/625/hovercard\" href=\"https://github.com/llvm/clangir/pull/625\">#625</a>)"}},{"before":"b5f3862ff406b9fe4a01404cf4b2913318b1a6d7","after":"9e87cfc1495c3a8e5c992571e7b01f56190df10d","ref":"refs/heads/main","pushedAt":"2024-05-29T06:36:39.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][Lowering] Add MLIR lowering support for CIR shift operations (#630)\n\nThis pr adds cir.shift lowering to MLIR passes and test files.","shortMessageHtmlLink":"[CIR][Lowering] Add MLIR lowering support for CIR shift operations (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2318057932\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/630\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/630/hovercard\" href=\"https://github.com/llvm/clangir/pull/630\">#630</a>"}},{"before":"492242b9a15535494de96f845bdfba6922991d70","after":"b5f3862ff406b9fe4a01404cf4b2913318b1a6d7","ref":"refs/heads/main","pushedAt":"2024-05-28T22:25:52.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][LowerToLLVM][CXXABI] Lower cir.va.arg (#573)\n\nlowering var_arg op for ARM64 architecture. This is CIR lowering.\r\n\r\nThis PR modified LoweringPrepare CXXABI code to make\r\nLoweringPrepareArm64CXXABI class inherit more generic\r\nLoweringPrepareItaniumCXXABI, this way lowering var_arg would be only\r\nmeaningful for arm64 targets and for other arch its no op for now.\r\n\r\nThe ABI doc and detailed algorithm description can be found in this\r\nofficial doc.\r\n\r\n[](https://github.com/ARM-software/abi-aa/blob/617079d8a0d45bec83d351974849483cf0cc66d5/aapcs64/aapcs64.rst#appendix-variable-argument-lists)","shortMessageHtmlLink":"[CIR][LowerToLLVM][CXXABI] Lower cir.va.arg (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2270112625\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/573\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/573/hovercard\" href=\"https://github.com/llvm/clangir/pull/573\">#573</a>)"}},{"before":"8effbcc532ff1fd466dbc1f19975b106d43cbf1b","after":"492242b9a15535494de96f845bdfba6922991d70","ref":"refs/heads/main","pushedAt":"2024-05-28T22:23:26.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][IR][NFC] Fix CallOp builder with void return (#629)\n\nOne of the builders was adding a retun value to the CallOp when given a\r\nvoid return type. The expected behavior is to not add a return value.\r\nTwo other minor fixes were added to the return value: its constraint was\r\nreplaced from variadic to optional and it was assigned a name. This\r\nprevents function calls with multiple returns and facilitates access to\r\nthe single return value, respectively.","shortMessageHtmlLink":"[CIR][IR][NFC] Fix CallOp builder with void return (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2317988470\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/629\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/629/hovercard\" href=\"https://github.com/llvm/clangir/pull/629\">#629</a>)"}},{"before":"49609ae8165009812bcdb18cf985153354a7aa16","after":"8effbcc532ff1fd466dbc1f19975b106d43cbf1b","ref":"refs/heads/main","pushedAt":"2024-05-24T19:06:08.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CodeGen] Support trailing_zeros for constant string literals (#617)\n\nThe patch resolves [issue\r\n#248](https://github.com/llvm/clangir/issues/248). It can be considered\r\na subsequent patch to [#373](https://github.com/llvm/clangir/pull/373),\r\nwhere the case of empty strings was processed.\r\n\r\nThe new patch adds processing for non-empty strings that may contain\r\ntrailing zeros, such as:\r\n```\r\nchar big_string[100000] = \"123\";\r\n```\r\nThat is converted to\r\n```\r\n@big_string = #cir.const_array<\"123\" : !cir.array<!s8i x 3>, trailing_zeros> : !cir.array<!s8i x 100000>\r\n```","shortMessageHtmlLink":"[CIR][CodeGen] Support trailing_zeros for constant string literals (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2304744533\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/617\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/617/hovercard\" href=\"https://github.com/llvm/clangir/pull/617\">#617</a>"}},{"before":"889eaa5c82a8c022f7c61f475ee1675a3bab6966","after":"49609ae8165009812bcdb18cf985153354a7aa16","ref":"refs/heads/main","pushedAt":"2024-05-24T05:00:54.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][LowerToLLVM] Forward or compute alignment for loads","shortMessageHtmlLink":"[CIR][LowerToLLVM] Forward or compute alignment for loads"}},{"before":"32087ebdd7be5931e030ffd2d46cff7bc2f3b286","after":"889eaa5c82a8c022f7c61f475ee1675a3bab6966","ref":"refs/heads/main","pushedAt":"2024-05-24T04:41:25.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][LowerToLLVM] Forward or compute alignment for every store\n\nLoad coming next.","shortMessageHtmlLink":"[CIR][LowerToLLVM] Forward or compute alignment for every store"}},{"before":"957c8d27aa0bb7ce4b0127ab0659d21ab8b0dab4","after":"32087ebdd7be5931e030ffd2d46cff7bc2f3b286","ref":"refs/heads/main","pushedAt":"2024-05-24T04:12:18.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen][NFC] Add optional alignment to cir.load and cir.store\n\nDon't hook this up with CIRGen just yet.\n\nWhile here update parsing tests to include `atomic(seq_cst)`.","shortMessageHtmlLink":"[CIR][CIRGen][NFC] Add optional alignment to cir.load and cir.store"}},{"before":"c3efc601639d18a2f6c9e49966ca368f8d3b91ad","after":"957c8d27aa0bb7ce4b0127ab0659d21ab8b0dab4","ref":"refs/heads/main","pushedAt":"2024-05-24T02:34:19.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR] Add -cir-mlir-scf-prepare to simplify lowering to SCF (#604)\n\nThis commit introduces SCFPreparePass to\r\n1) Canonicalize IV to LHS of loop comparison\r\nFor example, transfer `cir.cmp(gt, %bound, %IV)` to `cir.cmp(lt, %IV,\r\n%bound)`. So we could use RHS as boundary and use `lt` to determine it's\r\nan upper bound.\r\n2) Hoist loop invariant operations in condition block out of loop.\r\nThe condition block may be generated as following which contains the\r\noperations produced upper bound.\r\nSCF for loop required loop boundary as input operands. So we might need\r\nto hoist the boundary operations out of loop.\r\n```\r\n      cir.for : cond {\r\n        %4 = cir.load %2 : !cir.ptr<!s32i>, !s32i\r\n        %5 = cir.const #cir.int<100> : !s32i       <- upper bound\r\n        %6 = cir.cmp(lt, %4, %5) : !s32i, !s32i\r\n        %7 = cir.cast(int_to_bool, %6 : !s32i), !cir.boo\r\n        cir.condition(%7\r\n       } body {\r\n```","shortMessageHtmlLink":"[CIR] Add -cir-mlir-scf-prepare to simplify lowering to SCF (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2296997118\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/604\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/604/hovercard\" href=\"https://github.com/llvm/clangir/pull/604\">#604</a>)"}},{"before":"c3540b319c021743f0b3377d9850598981970f20","after":"c3efc601639d18a2f6c9e49966ca368f8d3b91ad","ref":"refs/heads/main","pushedAt":"2024-05-24T00:17:34.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CodeGen][Bugfix] store fptr of a function with no args (#622)\n\nThis PR fixes the next bug showed in the example below:\r\n```\r\ntypedef int (*fn_t)();\r\nint get42() { return 42; }\r\n\r\nvoid foo() {\r\n  fn_t f = get42;\r\n}\r\n```\r\n\r\nThe function type `fn_t` is generated as the variadic one due to no arg\r\ntypes listed, this is the `codegen` feature. And once we store the\r\nfunction pointer to a real function - a pointer to `get42` here has the\r\nexpected `i32 ()*` type - we get a verification error, so `bitcast` is\r\nneeded. The original `codegen` doesn't have it because of opaque\r\npointers used, and had the `bitcast` earlier, long time ago:\r\n```\r\n%f = alloca i32 (...)*\r\nstore i32 (...)* bitcast (i32 ()* @get42 to i32 (...)*), i32 (...)** %f\r\n```","shortMessageHtmlLink":"[CIR][CodeGen][Bugfix] store fptr of a function with no args (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2310300955\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/622\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/622/hovercard\" href=\"https://github.com/llvm/clangir/pull/622\">#622</a>)"}},{"before":"c2e22aa77136222690b89080c9847534fe729c07","after":"c3540b319c021743f0b3377d9850598981970f20","ref":"refs/heads/main","pushedAt":"2024-05-24T00:16:53.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CodeGen][Bugfix] fixes volatile structs copy (#623)\n\nThis PR fixes a fail on `llvm_unreachable`  for the next case:\r\n``` \r\nvolatile A vol_a;\r\nA foo7() {\r\n  return vol_a;\r\n}\r\n```\r\nBasically, it's just a copy-pasta from the original `code-gen`. \r\nAlso, I added the `isVolatile` attribute for the `cit.copy` operation","shortMessageHtmlLink":"[CIR][CodeGen][Bugfix] fixes volatile structs copy (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2310484944\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/623\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/623/hovercard\" href=\"https://github.com/llvm/clangir/pull/623\">#623</a>)"}},{"before":"c4ea64fe94ed3662a203187b29ebab54545f88e2","after":"f931572ad3fe353f661550caf27a707b58d83d8c","ref":"refs/heads/gh-pages","pushedAt":"2024-05-24T00:12:04.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][doc] Add CIR assembly style guide (#619)\n\nThis PR adds documentation for CIR assembly style guide. Follows #583 .","shortMessageHtmlLink":"[CIR][doc] Add CIR assembly style guide (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2306011910\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/619\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/619/hovercard\" href=\"https://github.com/llvm/clangir/pull/619\">#619</a>)"}},{"before":"ce56a3ffd375ce5b39cad934f4cbd159a8dd8962","after":"c2e22aa77136222690b89080c9847534fe729c07","ref":"refs/heads/main","pushedAt":"2024-05-24T00:03:05.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][ThroughMLIR] Support lowering ForOp to scf (#605)\n\nThis commit introduces CIRForOpLowering for lowering to scf.\r\n\r\nThe initial commit only support increment loop with lt or le comparison.","shortMessageHtmlLink":"[CIR][ThroughMLIR] Support lowering ForOp to scf (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2297012235\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/605\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/605/hovercard\" href=\"https://github.com/llvm/clangir/pull/605\">#605</a>)"}},{"before":"ab67854a3e6e1b56027c2b95cc7724fe64ac54ab","after":"ce56a3ffd375ce5b39cad934f4cbd159a8dd8962","ref":"refs/heads/main","pushedAt":"2024-05-23T23:58:26.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Support CodeGen for structural bindings (#618)\n\nIn this PR I added the support for structural bindings in CIR codegen,\r\nto reason `DecompositionDecl` and `BindDecl` properly.\r\n\r\nNote that since `ArrayInitLoopExpr` is not implemented so binding to\r\narrays is not supported yet.","shortMessageHtmlLink":"[CIR][CIRGen] Support CodeGen for structural bindings (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2305694413\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/618\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/618/hovercard\" href=\"https://github.com/llvm/clangir/pull/618\">#618</a>)"}},{"before":"8e1e90906fa5866d6b210ff08ae328c319c9895f","after":"ab67854a3e6e1b56027c2b95cc7724fe64ac54ab","ref":"refs/heads/main","pushedAt":"2024-05-23T23:49:02.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] AArch64 builtins: add support for neon vld1/vst1\n\nThe alignment is still super conversative but proper support should\ncome next. The added test file also contains a huge pile of builtins\nwe need to support and should allow for incremental support here.\n\nNext steps: fix alignement and enable testing for other vld1/vst1 variants.","shortMessageHtmlLink":"[CIR][CIRGen] AArch64 builtins: add support for neon vld1/vst1"}},{"before":"e9719c6cb36d7d31f8c8d139e0268c31f0df791b","after":"8e1e90906fa5866d6b210ff08ae328c319c9895f","ref":"refs/heads/main","pushedAt":"2024-05-22T23:36:09.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen][NFC] More AArch64 builtins skeleton\n\nJust mimic the table approach from OG codegen, there are thousands of these,\nit's massive! This doesn't add any new feature yet, continues asserting as\nbefore.\n\nComing next: the plan is to reuse the tablegen generated LLVM intrinsics, and\npass that down to LLVM lowering.","shortMessageHtmlLink":"[CIR][CIRGen][NFC] More AArch64 builtins skeleton"}},{"before":"e3b160f8f6fa21627e55fc4f24be6ca696c4d211","after":"e9719c6cb36d7d31f8c8d139e0268c31f0df791b","ref":"refs/heads/main","pushedAt":"2024-05-22T00:40:47.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR] Move CIRDataLayout.h into include/clang/CIR/Dialect/IR (#621)\n\nMove it up for visibility, just like the other dialect headers.","shortMessageHtmlLink":"[CIR] Move CIRDataLayout.h into include/clang/CIR/Dialect/IR (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2309241924\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/621\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/621/hovercard\" href=\"https://github.com/llvm/clangir/pull/621\">#621</a>)"}},{"before":"632d7e0551015be1667309009af28197c19a00c4","after":"e3b160f8f6fa21627e55fc4f24be6ca696c4d211","ref":"refs/heads/main","pushedAt":"2024-05-21T22:33:50.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Add support for gnu range on switch stmts (#599)\n\nFix #596","shortMessageHtmlLink":"[CIR][CIRGen] Add support for gnu range on switch stmts (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2290728037\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/599\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/599/hovercard\" href=\"https://github.com/llvm/clangir/pull/599\">#599</a>)"}},{"before":"1166bdbd882ab5fa62e2fc91b7501e20f20a69a1","after":"632d7e0551015be1667309009af28197c19a00c4","ref":"refs/heads/main","pushedAt":"2024-05-21T22:06:18.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen][LLVMLowering] Vtable support for simple multiple inhertance without thunk (#569)\n\nThis PR adds Vtable support for C++ multiple inheritance without thunk.\r\nThis change contains the CIR codegen and lowering work:\r\n1. `VTableAttr` should allow adding multiple `ArrayAttr` for\r\nmulti-inheritance.\r\n3. `VTableAddrPointOpLowering` has been fixed for the multi-vtable\r\nduring the MLIR lowering phase.\r\n    \r\nExample:\r\n```c++\r\n    class Mother {\r\n      virtual void MotherFoo() {}\r\n      virtual void MotherFoo2() {}\r\n    }\r\n    \r\n    class Father {\r\n      virtual void FatherFoo() {}\r\n    }\r\n    \r\n    class Child : public Mother, public Father {\r\n      void MotherFoo() override {}\r\n    }\r\n```\r\n```mlir\r\n    cir.global linkonce_odr @_ZTV5Child = #cir.vtable<\r\n    {#cir.const_array<[\r\n      #cir.ptr<null> :  #!cir.ptr<!u8i>,\r\n      #cir.global_view<@_ZTI5Child> : !cir.ptr<!u8i>,\r\n      #cir.global_view<@_ZN5Child9MotherFooEv> : !cir.ptr<!u8i>,\r\n      #cir.global_view<@_ZN6Mother10MotherFoo2Ev> : !cir.ptr<!u8i>]> : !cir.array<!cir.ptr<!u8i> x 4>,\r\n     #cir.const_array<[\r\n      #cir.ptr<-8> : !cir.ptr<!u8i>,\r\n      #cir.global_view<@_ZTI5Child> : !cir.ptr<!u8i>,\r\n      #cir.global_view<@_ZN6Father9FatherFooEv> : !cir.ptr<!u8i>]\r\n    > : !cir.array<!cir.ptr<!u8i> x 3>}> : !ty_anon_struct3\r\n```","shortMessageHtmlLink":"[CIR][CIRGen][LLVMLowering] Vtable support for simple multiple inhert…"}},{"before":"e385d1fd80f3f6cf13a19fa778348dab239cd01e","after":"c4ea64fe94ed3662a203187b29ebab54545f88e2","ref":"refs/heads/gh-pages","pushedAt":"2024-05-21T21:52:15.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"More updates to auto and camel discussion","shortMessageHtmlLink":"More updates to auto and camel discussion"}},{"before":"14345d90319d02a3e229412cb69726252afa58ed","after":"e385d1fd80f3f6cf13a19fa778348dab239cd01e","ref":"refs/heads/gh-pages","pushedAt":"2024-05-20T22:38:35.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"Add coding guideline page","shortMessageHtmlLink":"Add coding guideline page"}},{"before":"5730174978426d134e3ec3a8dda896bf80f7c983","after":"1166bdbd882ab5fa62e2fc91b7501e20f20a69a1","ref":"refs/heads/main","pushedAt":"2024-05-20T19:12:27.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen][LowerToLLVM] Add address space attribute for pointer type (#606)\n\nThis is the prelude of address space support. Linked issue: #418 .\r\n\r\n- Add the attribute and implement asm format & type conversion.\r\n- Make ops like `cir.global` and `cir.get_global` aware of address space, and solve the latter flag.\r\n- Relax the restriction of default alloca address space. Then we can use correct address spaces for languages like OpenCL in future.","shortMessageHtmlLink":"[CIR][CIRGen][LowerToLLVM] Add address space attribute for pointer ty…"}},{"before":"dad7c84cc555cd4a2cf03cd356526e095e900566","after":"5730174978426d134e3ec3a8dda896bf80f7c983","ref":"refs/heads/main","pushedAt":"2024-05-18T04:27:23.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Support for signed #cir.ptr (#598)\n\nThe constant initialization isn't related to the pointee. We should be\r\nable to write #cir.ptr<-1 ： i64> : !cir.ptr<whatever>","shortMessageHtmlLink":"[CIR][CIRGen] Support for signed #cir.ptr (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2288887146\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/598\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/598/hovercard\" href=\"https://github.com/llvm/clangir/pull/598\">#598</a>)"}},{"before":"ff44cfb40ea93762de4b46af9a31537d8cf8680c","after":"dad7c84cc555cd4a2cf03cd356526e095e900566","ref":"refs/heads/main","pushedAt":"2024-05-18T04:11:06.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[CIR][CIRGen] Fix compound assignment for vector types (#610)\n\nThere is [a code\r\npath](https://github.com/llvm/clangir/blob/3da10fafac66ff125fb59c602e41ad4b4f5cb382/clang/lib/CodeGen/CGExpr.cpp#L2190)\r\nmissing the counterpart in CIRGen of vector types. When using compound\r\nassignments like `a[0] += a[1]`, this code path is activated and end up\r\nwith NYI.","shortMessageHtmlLink":"[CIR][CIRGen] Fix compound assignment for vector types (<a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2299505099\" data-permission-text=\"Title is private\" data-url=\"https://github.com/llvm/clangir/issues/610\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/llvm/clangir/pull/610/hovercard\" href=\"https://github.com/llvm/clangir/pull/610\">#610</a>)"}},{"before":"0d5d153ee737f0287e3f69b0601890afbf907c8b","after":"ff44cfb40ea93762de4b46af9a31537d8cf8680c","ref":"refs/heads/main","pushedAt":"2024-05-18T04:09:27.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"bcardosolopes","name":"Bruno Cardoso Lopes","path":"/bcardosolopes","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7115212?s=80&v=4"},"commit":{"message":"[NFC][CIR] Complete CIR check in test case ctor-member-lvalue-to-rvalue (#608)\n\nSeems the FIXME has been solved since I've confirmed that these CHECK\r\ncan pass now.\r\n\r\nRemove the FIXME and recover these CHECK.","shortMessageHtmlLink":"[NFC][CIR] Complete CIR check in test case ctor-member-lvalue-to-rval…"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEWH50dgA","startCursor":null,"endCursor":null}},"title":"Activity · llvm/clangir"}