From 0e6976f5eef32a869400d8b924ce107eba06e6ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C3=ABl=20Zasso?= Date: Sat, 17 Apr 2021 16:28:42 +0200 Subject: [PATCH] deps: V8: cherry-pick ed3eedae33d0 Original commit message: Merged: [ia32][wasm-simd] Fix aligned moves in codegen For SIMD instructions that use aligned moves (like movaps or movapd), we don't have correct memory alignment for SIMD moves yet. Switch to to movupd. TBR=bbudge@chromium.org,adamk@chromium.org Bug: v8:9198 Bug: v8:10831 Bug: chromium:1134039 (cherry picked from commit ab23ff3c0eed141361365241d13e3211efd608cf) Change-Id: Icc038b4a32364b8bc66b723403ccc11f954b080d No-Try: true No-Presubmit: true No-Tree-Checks: true Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2469600 Commit-Queue: Zhi An Ng Reviewed-by: Zhi An Ng Cr-Commit-Position: refs/branch-heads/8.6@{#30} Cr-Branched-From: a64aed2333abf49e494d2a5ce24bbd14fff19f60-refs/heads/8.6.395@{#1} Cr-Branched-From: a626bc036236c9bf92ac7b87dc40c9e538b087e3-refs/heads/master@{#69472} Refs: https://github.com/v8/v8/commit/ed3eedae33d03227c2c9bb6114234dbc2f5aca52 PR-URL: https://github.com/nodejs/node/pull/38275 Reviewed-By: Matteo Collina Reviewed-By: Jiawen Geng Reviewed-By: Shelley Vohr --- common.gypi | 2 +- deps/v8/src/codegen/ia32/assembler-ia32.h | 4 ++++ deps/v8/src/codegen/ia32/macro-assembler-ia32.h | 1 + .../src/compiler/backend/ia32/code-generator-ia32.cc | 6 +++--- deps/v8/src/diagnostics/ia32/disasm-ia32.cc | 12 +++++++++++- deps/v8/test/cctest/test-disasm-ia32.cc | 2 ++ 6 files changed, 22 insertions(+), 5 deletions(-) diff --git a/common.gypi b/common.gypi index 8b682923760e7d..96be81a70f8a0a 100644 --- a/common.gypi +++ b/common.gypi @@ -36,7 +36,7 @@ # Reset this number to 0 on major V8 upgrades. # Increment by one for each non-official patch applied to deps/v8. - 'v8_embedder_string': '-node.35', + 'v8_embedder_string': '-node.36', ##### V8 defaults for Node.js ##### diff --git a/deps/v8/src/codegen/ia32/assembler-ia32.h b/deps/v8/src/codegen/ia32/assembler-ia32.h index 60d978df5be26f..ded1e020e28627 100644 --- a/deps/v8/src/codegen/ia32/assembler-ia32.h +++ b/deps/v8/src/codegen/ia32/assembler-ia32.h @@ -959,6 +959,9 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { void movapd(XMMRegister dst, Operand src) { sse2_instr(dst, src, 0x66, 0x0F, 0x28); } + void movupd(XMMRegister dst, Operand src) { + sse2_instr(dst, src, 0x66, 0x0F, 0x10); + } void movmskpd(Register dst, XMMRegister src); void movmskps(Register dst, XMMRegister src); @@ -1331,6 +1334,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { void vmovapd(XMMRegister dst, Operand src) { vpd(0x28, dst, xmm0, src); } void vmovups(XMMRegister dst, XMMRegister src) { vmovups(dst, Operand(src)); } void vmovups(XMMRegister dst, Operand src) { vps(0x10, dst, xmm0, src); } + void vmovupd(XMMRegister dst, Operand src) { vpd(0x10, dst, xmm0, src); } void vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) { vshufps(dst, src1, Operand(src2), imm8); } diff --git a/deps/v8/src/codegen/ia32/macro-assembler-ia32.h b/deps/v8/src/codegen/ia32/macro-assembler-ia32.h index 94ddb2f784795a..9909d732cf988e 100644 --- a/deps/v8/src/codegen/ia32/macro-assembler-ia32.h +++ b/deps/v8/src/codegen/ia32/macro-assembler-ia32.h @@ -292,6 +292,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { AVX_OP2_WITH_TYPE(Movaps, movaps, XMMRegister, XMMRegister) AVX_OP2_WITH_TYPE(Movapd, movapd, XMMRegister, XMMRegister) AVX_OP2_WITH_TYPE(Movapd, movapd, XMMRegister, const Operand&) + AVX_OP2_WITH_TYPE(Movupd, movupd, XMMRegister, const Operand&) AVX_OP2_WITH_TYPE(Pmovmskb, pmovmskb, Register, XMMRegister) AVX_OP2_WITH_TYPE(Movmskps, movmskps, Register, XMMRegister) diff --git a/deps/v8/src/compiler/backend/ia32/code-generator-ia32.cc b/deps/v8/src/compiler/backend/ia32/code-generator-ia32.cc index c673458c75371b..52371f9d1f9696 100644 --- a/deps/v8/src/compiler/backend/ia32/code-generator-ia32.cc +++ b/deps/v8/src/compiler/backend/ia32/code-generator-ia32.cc @@ -1966,7 +1966,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( tmp = i.TempSimd128Register(0); // The minpd instruction doesn't propagate NaNs and +0's in its first // operand. Perform minpd in both orders, merge the resuls, and adjust. - __ Movapd(tmp, src1); + __ Movupd(tmp, src1); __ Minpd(tmp, tmp, src); __ Minpd(dst, src, src1); // propagate -0's and NaNs, which may be non-canonical. @@ -1985,7 +1985,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( tmp = i.TempSimd128Register(0); // The maxpd instruction doesn't propagate NaNs and +0's in its first // operand. Perform maxpd in both orders, merge the resuls, and adjust. - __ Movapd(tmp, src1); + __ Movupd(tmp, src1); __ Maxpd(tmp, tmp, src); __ Maxpd(dst, src, src1); // Find discrepancies. @@ -2375,7 +2375,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( XMMRegister dst = i.OutputSimd128Register(); Operand src1 = i.InputOperand(1); // See comment above for correction of maxps. - __ movaps(kScratchDoubleReg, src1); + __ vmovups(kScratchDoubleReg, src1); __ vmaxps(kScratchDoubleReg, kScratchDoubleReg, dst); __ vmaxps(dst, dst, src1); __ vxorps(dst, dst, kScratchDoubleReg); diff --git a/deps/v8/src/diagnostics/ia32/disasm-ia32.cc b/deps/v8/src/diagnostics/ia32/disasm-ia32.cc index 5e0c5c65e2342e..a489968e1bdf77 100644 --- a/deps/v8/src/diagnostics/ia32/disasm-ia32.cc +++ b/deps/v8/src/diagnostics/ia32/disasm-ia32.cc @@ -1161,6 +1161,10 @@ int DisassemblerIA32::AVXInstruction(byte* data) { int mod, regop, rm, vvvv = vex_vreg(); get_modrm(*current, &mod, ®op, &rm); switch (opcode) { + case 0x10: + AppendToBuffer("vmovupd %s,", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + break; case 0x28: AppendToBuffer("vmovapd %s,", NameOfXMMRegister(regop)); current += PrintRightXMMOperand(current); @@ -2090,7 +2094,13 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector out_buffer, data += 2; } else if (*data == 0x0F) { data++; - if (*data == 0x28) { + if (*data == 0x10) { + data++; + int mod, regop, rm; + get_modrm(*data, &mod, ®op, &rm); + AppendToBuffer("movupd %s,", NameOfXMMRegister(regop)); + data += PrintRightXMMOperand(data); + } else if (*data == 0x28) { data++; int mod, regop, rm; get_modrm(*data, &mod, ®op, &rm); diff --git a/deps/v8/test/cctest/test-disasm-ia32.cc b/deps/v8/test/cctest/test-disasm-ia32.cc index 496fa666844783..39ecc460619d17 100644 --- a/deps/v8/test/cctest/test-disasm-ia32.cc +++ b/deps/v8/test/cctest/test-disasm-ia32.cc @@ -473,6 +473,7 @@ TEST(DisasmIa320) { __ movapd(xmm0, xmm1); __ movapd(xmm0, Operand(edx, 4)); + __ movupd(xmm0, Operand(edx, 4)); __ movd(xmm0, edi); __ movd(xmm0, Operand(ebx, ecx, times_4, 10000)); @@ -689,6 +690,7 @@ TEST(DisasmIa320) { __ vmovaps(xmm0, xmm1); __ vmovapd(xmm0, xmm1); __ vmovapd(xmm0, Operand(ebx, ecx, times_4, 10000)); + __ vmovupd(xmm0, Operand(ebx, ecx, times_4, 10000)); __ vshufps(xmm0, xmm1, xmm2, 3); __ vshufps(xmm0, xmm1, Operand(edx, 4), 3); __ vhaddps(xmm0, xmm1, xmm2);