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Revert "deps: fix zlib compilation for CPUs without SIMD features"
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This reverts commit 26991f7.

PR-URL: #45589
Fixes: #32856
Reviewed-By: Richard Lau <rlau@redhat.com>
Reviewed-By: Yagiz Nizipli <yagiz@nizipli.com>
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lpinca authored and danielleadams committed Jan 3, 2023
1 parent dc862fe commit c04e1df
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Showing 3 changed files with 0 additions and 20 deletions.
4 changes: 0 additions & 4 deletions deps/zlib/adler32_simd.c
Expand Up @@ -50,13 +50,9 @@
#define NMAX 5552

#if defined(ADLER32_SIMD_SSSE3)
#ifndef __GNUC__
#define __attribute__()
#endif

#include <tmmintrin.h>

__attribute__((target("ssse3")))
uint32_t ZLIB_INTERNAL adler32_simd_( /* SSSE3 */
uint32_t adler,
const unsigned char *buf,
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4 changes: 0 additions & 4 deletions deps/zlib/crc32_simd.c
Expand Up @@ -8,9 +8,6 @@
#include "crc32_simd.h"

#if defined(CRC32_SIMD_SSE42_PCLMUL)
#ifndef __GNUC__
#define __attribute__()
#endif

/*
* crc32_sse42_simd_(): compute the crc32 of the buffer, where the buffer
Expand All @@ -24,7 +21,6 @@
#include <smmintrin.h>
#include <wmmintrin.h>

__attribute__((target("sse4.2,pclmul")))
uint32_t ZLIB_INTERNAL crc32_sse42_simd_( /* SSE4.2+PCLMUL */
const unsigned char *buf,
z_size_t len,
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12 changes: 0 additions & 12 deletions deps/zlib/crc_folding.c
Expand Up @@ -25,10 +25,6 @@
#include <immintrin.h>
#include <wmmintrin.h>

#ifndef __GNUC__
#define __attribute__()
#endif

#define CRC_LOAD(s) \
do { \
__m128i xmm_crc0 = _mm_loadu_si128((__m128i *)s->crc0 + 0);\
Expand All @@ -45,7 +41,6 @@
_mm_storeu_si128((__m128i *)s->crc0 + 4, xmm_crc_part);\
} while (0);

__attribute__((target("sse4.2,pclmul")))
ZLIB_INTERNAL void crc_fold_init(deflate_state *const s)
{
CRC_LOAD(s)
Expand All @@ -60,7 +55,6 @@ ZLIB_INTERNAL void crc_fold_init(deflate_state *const s)
s->strm->adler = 0;
}

__attribute__((target("sse4.2,pclmul")))
local void fold_1(deflate_state *const s,
__m128i *xmm_crc0, __m128i *xmm_crc1,
__m128i *xmm_crc2, __m128i *xmm_crc3)
Expand All @@ -87,7 +81,6 @@ local void fold_1(deflate_state *const s,
*xmm_crc3 = _mm_castps_si128(ps_res);
}

__attribute__((target("sse4.2,pclmul")))
local void fold_2(deflate_state *const s,
__m128i *xmm_crc0, __m128i *xmm_crc1,
__m128i *xmm_crc2, __m128i *xmm_crc3)
Expand Down Expand Up @@ -122,7 +115,6 @@ local void fold_2(deflate_state *const s,
*xmm_crc3 = _mm_castps_si128(ps_res31);
}

__attribute__((target("sse4.2,pclmul")))
local void fold_3(deflate_state *const s,
__m128i *xmm_crc0, __m128i *xmm_crc1,
__m128i *xmm_crc2, __m128i *xmm_crc3)
Expand Down Expand Up @@ -163,7 +155,6 @@ local void fold_3(deflate_state *const s,
*xmm_crc3 = _mm_castps_si128(ps_res32);
}

__attribute__((target("sse4.2,pclmul")))
local void fold_4(deflate_state *const s,
__m128i *xmm_crc0, __m128i *xmm_crc1,
__m128i *xmm_crc2, __m128i *xmm_crc3)
Expand Down Expand Up @@ -230,7 +221,6 @@ local const unsigned zalign(32) pshufb_shf_table[60] = {
0x0201008f,0x06050403,0x0a090807,0x0e0d0c0b /* shl 1 (16 -15)/shr15*/
};

__attribute__((target("sse4.2,pclmul")))
local void partial_fold(deflate_state *const s, const size_t len,
__m128i *xmm_crc0, __m128i *xmm_crc1,
__m128i *xmm_crc2, __m128i *xmm_crc3,
Expand Down Expand Up @@ -281,7 +271,6 @@ local void partial_fold(deflate_state *const s, const size_t len,
*xmm_crc3 = _mm_castps_si128(ps_res);
}

__attribute__((target("sse4.2,pclmul")))
ZLIB_INTERNAL void crc_fold_copy(deflate_state *const s,
unsigned char *dst, const unsigned char *src, long len)
{
Expand Down Expand Up @@ -438,7 +427,6 @@ local const unsigned zalign(16) crc_mask2[4] = {
0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
};

__attribute__((target("sse4.2,pclmul")))
unsigned ZLIB_INTERNAL crc_fold_512to32(deflate_state *const s)
{
const __m128i xmm_mask = _mm_load_si128((__m128i *)crc_mask);
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