Improved ARM64 code generation #9937
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stedolan
reviewed
Nov 24, 2020
stedolan
reviewed
Nov 24, 2020
stedolan
approved these changes
Nov 24, 2020
…ions Now we recognize the full set of hardware supported immediate operands. `is_logical_immediate` was moved from Selection to Arch and made to work on nativeints. This is in preparation for future use in Emit.
Add a special case for immediates that can be loaded in one "or" instruction. Refactor the code that produces sequences of movz/movn/movk to be less redundant and to choose the shortest sequence between the "movz" sequence and the "movn" sequence.
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Thanks for the review. I rebased and am running a round of "precheck" CI. |
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CI on ARM64 is happy. Merging! |
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This PR improves (marginally) the code generated by the ARM64 port.
The first commit recognizes the full set of hardware-supported immediate operands for logical operations. The code is slightly tricky but is similar to the code that CompCert uses when targeting ARM64.
The second commit tries to generate shorter instruction sequences for loading large integer constants. Again, it is inspired by CompCert for ARM64. It also reduces code duplication between determining the size of the instruction sequence and actually generating it.
The third commit recognizes the
sbfminstruction for sign extensions. This should improve a bit the code generated forint32arithmetic.