{"payload":{"pageCount":1,"repositories":[{"type":"Public","name":"fpga-vbs","owner":"missinglinkelectronics","isFork":false,"description":"Vivado build system","allTopics":[],"primaryLanguage":{"name":"Tcl","color":"#e4cc98"},"pullRequestCount":0,"issueCount":0,"starsCount":65,"forksCount":13,"license":"Apache License 2.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-04-17T09:51:12.409Z"}},{"type":"Public","name":"psmake","owner":"missinglinkelectronics","isFork":false,"description":"Processing System Makefiles","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":0,"starsCount":15,"forksCount":2,"license":"Apache License 2.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-03-11T09:06:31.582Z"}},{"type":"Public","name":"libuio","owner":"missinglinkelectronics","isFork":false,"description":"UserspaceIO helper library","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":2,"issueCount":5,"starsCount":29,"forksCount":28,"license":"GNU Lesser General Public License v2.1","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-03-07T11:22:51.889Z"}},{"type":"Public","name":"verilog-i2c","owner":"missinglinkelectronics","isFork":true,"description":"Verilog I2C interface for FPGA implementation","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":161,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-29T08:14:40.157Z"}},{"type":"Public","name":"corundum","owner":"missinglinkelectronics","isFork":true,"description":"Open source, high performance, FPGA-based NIC","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":379,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-12-20T13:01:25.811Z"}},{"type":"Public","name":"multi_power_sequencer","owner":"missinglinkelectronics","isFork":true,"description":"Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, such as dynamic adjustments and debug via PMBus, adjustable timing, power rail grouping, etc.","allTopics":[],"primaryLanguage":{"name":"SystemVerilog","color":"#DAE1C2"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":5,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-11-28T14:41:55.649Z"}},{"type":"Public","name":"uhd","owner":"missinglinkelectronics","isFork":true,"description":"The USRP™ Hardware Driver Repository","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":641,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-11-16T22:43:38.585Z"}},{"type":"Public","name":"HomaModule","owner":"missinglinkelectronics","isFork":true,"description":"A Linux kernel module that implements the Homa transport protocol.","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":41,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-11-16T10:39:27.310Z"}},{"type":"Public","name":"labgrid","owner":"missinglinkelectronics","isFork":true,"description":"embedded systems control library for development, testing and installation","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":159,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-11-15T15:55:46.647Z"}},{"type":"Public","name":"dpdk-stable","owner":"missinglinkelectronics","isFork":false,"description":"Not regularly updated clone of http://git.dpdk.org/dpdk-stable/ with the purpose to develop a new driver for corundum/mqnic (https://github.com/corundum/corundum).","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":12,"forksCount":5,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-08-24T18:10:41.467Z"}},{"type":"Public","name":"eyediagram","owner":"missinglinkelectronics","isFork":true,"description":"Tools for plotting an eye diagram in Python.","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":22,"license":"BSD 2-Clause \"Simplified\" License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-06-16T20:09:11.885Z"}},{"type":"Public","name":"sphinx","owner":"missinglinkelectronics","isFork":true,"description":"Main repository for the Sphinx documentation builder","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":3,"issueCount":0,"starsCount":0,"forksCount":2016,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-06-05T01:59:41.849Z"}},{"type":"Public","name":"xfcp","owner":"missinglinkelectronics","isFork":true,"description":"Extensible FPGA control platform","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":19,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-28T18:34:47.840Z"}},{"type":"Public","name":"verilog-axis","owner":"missinglinkelectronics","isFork":true,"description":"Verilog AXI stream components for FPGA implementation","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":211,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-02-17T23:56:51.106Z"}},{"type":"Public","name":"sphinxcontrib-scalebybuilder","owner":"missinglinkelectronics","isFork":false,"description":"Sphinx scale image by builder extension","allTopics":["sphinx-extension"],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-01-13T18:24:17.254Z"}},{"type":"Public","name":"sphinxcontrib-svg2pdfconverter","owner":"missinglinkelectronics","isFork":false,"description":"Sphinx SVG to PDF converter extension","allTopics":["sphinx-extension"],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":1,"starsCount":18,"forksCount":9,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-01-13T18:17:58.593Z"}},{"type":"Public","name":"sphinxcontrib-globalsubs","owner":"missinglinkelectronics","isFork":false,"description":"Sphinx global substitutions extension","allTopics":["sphinx-extension"],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":7,"forksCount":2,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-01-13T18:05:58.012Z"}},{"type":"Public","name":"labgrid-frontend-mle","owner":"missinglinkelectronics","isFork":true,"description":"A web frontend for labgrid in cooperation with MLE.","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":4,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-08-18T07:26:28.120Z"}},{"type":"Public","name":"verilog-pcie","owner":"missinglinkelectronics","isFork":true,"description":"Verilog PCI express components","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":266,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-06-24T15:20:49.920Z"}},{"type":"Public","name":"dma-bench","owner":"missinglinkelectronics","isFork":true,"description":"","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":11,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-06-24T15:20:15.781Z"}},{"type":"Public","name":"verilog-axi","owner":"missinglinkelectronics","isFork":true,"description":"Verilog AXI components for FPGA implementation","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":410,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-06-09T14:43:56.397Z"}},{"type":"Public","name":"verilog-ethernet","owner":"missinglinkelectronics","isFork":true,"description":"Verilog Ethernet components for FPGA implementation","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":617,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-06-09T14:43:40.439Z"}},{"type":"Public","name":"LED-Detection","owner":"missinglinkelectronics","isFork":true,"description":"","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":2,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-05-18T15:09:20.621Z"}},{"type":"Public","name":"dpdk","owner":"missinglinkelectronics","isFork":true,"description":"Data Plane Development Kit","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":1180,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-03-29T09:45:50.876Z"}},{"type":"Public","name":"pdudaemon","owner":"missinglinkelectronics","isFork":true,"description":"Python daemon for controlling/sequentially executing commands to PDUs (Power Distribution Units)","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":61,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-03-04T13:59:40.603Z"}},{"type":"Public","name":"boss","owner":"missinglinkelectronics","isFork":false,"description":"Boss is the Board State Distribution System","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":1,"license":"GNU Lesser General Public License v2.1","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2020-06-28T09:42:48.206Z"}},{"type":"Public","name":"wireshark","owner":"missinglinkelectronics","isFork":true,"description":"Read-only mirror of Wireshark's Git repository. GitHub won't let us disable pull requests. ☞ THEY WILL BE IGNORED HERE ☜ Please upload them at https://code.wireshark.org/review/ .","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":1806,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2020-04-28T06:13:28.804Z"}},{"type":"Public","name":"Shunt","owner":"missinglinkelectronics","isFork":true,"description":"SystemVerilog DPI \"TCP/IP Shunt\" (TCP/IP system verilog socket library)","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":7,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2020-02-24T01:02:46.814Z"}},{"type":"Public","name":"pkg-pdudaemon","owner":"missinglinkelectronics","isFork":true,"description":"Debian and Ubuntu packaging for the lavapdu support package used by LAVA","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":7,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2019-12-10T13:51:42.015Z"}},{"type":"Public","name":"wireshark-pcie","owner":"missinglinkelectronics","isFork":true,"description":"wireshark dissector ","allTopics":[],"primaryLanguage":{"name":"Lua","color":"#000080"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":3,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2019-11-21T15:32:03.332Z"}}],"repositoryCount":30,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"Repositories"}