RgGen
Shahbaz Hussain
mshahbazhussain
Interested in
• Low-power Energy-Efficient circuits
• Spintronics
• Hardware security
• FPGA H/w implementation
• Approximate computing
AMU Aligarh
Huaqi Fang
fanghuaqi
Embrace AI-IoT | RISC-V | ARM | ARC
Huazhong University of Sci & Tech Wuhan, Hubei
Ahmed Eid
A7med3id10
Electronics and Electrical Communications Engineering Student
Cairo University Cairo, Egypt
Max Baker
maxslug
Designer of strange chips : rad-hard, space-timed, and side-channel protected. VLSI and ASIC digital design. Recovering SW engineer and author of Netdisco.
San Francisco, California
Dmitry Murzinov
iDoka
Hardware Imagineer |
Digital IC Design Engineer |
Automotive Electronics Enthusiast
@dokard @deepware-ai Error: Unable to resolve
Jung Jae Min
jmjung0
RTL(Verilog/System Verilog/VHDL)
FPGA(Xilinx, Altera)
Embedded SW (Linux/Yocto, C/C++)
Compute Accelerator HW
RISC-V
Ray Tracing
AI/ DeepLearning
SiliconArts Seoul
James
FPGA-James
FPGA Developer with 10 years experience
2 years ASIC experience.
This repo is for personal projects and configuration files I use for development
Pradeep Purushothaman Vadakkodathu
vadakkodan
SoC/FPGA IP Design Engineer | Verilog | VHDL | SystemVerilog | C | BASH | Python | Linux | XILINX | Intel Altera | ISE | Vivado | XPS | XSG |
Matlab | 5GNR
Freelancer Bengaluru
Konstantin Tyutin
MarsWise
Wireless Engineer | RF Engineer | SDR Engineer | DSP Engineer | Embedded Engineer | FPGA Engineer | Hardware Design Engineer | Electronics Design Engineer
Uniblock Inc Almaty
