Skip to content

Latest commit

 

History

History
3 lines (2 loc) · 270 Bytes

README.md

File metadata and controls

3 lines (2 loc) · 270 Bytes

easyfpga-soc

This repository contains HDL sources of the easyCores and the soc-bridge that manages the communication with the host. It is meant to be used in conjunction with easyFPGA and therefore included as a submodule.