axi_dw_downsizer writing data beats with wstrb == 0

[Kevin99214]

Hello,

I am trying to use the axi_converter to downsize from a data width of 128 to 64 bits and then connected to an axi_to_reg so I can interface with the iDMA frontend.

When I do a 64 bit write, the Slave axi write writes one data beat with wstrb 0x00ff. The downsizer then translate that to a write with of burst length of 2 where the last data beat has a wstrb of 0x0.

I understand this can't be changed for burst writes where you can't see the last data beat's wstrb. But for a single data beat where you know the wstrb, this seems like a lot of overhead (half of my writes are not useful). For larger a conv_ratio, the percentage of not useful to useful writes would get even higher.

I have pushed an example of this change here. Please let me know if this is a feature worth considering.

Thanks

EDIT:
In release v0.4.2 of register interface, a new axi_to_reg_v2 was released to natively handle larger axi data widths.

This new module solves my issue specifically but I think this change is still applicable in other cases.