Support Pkl format

[taichi-ishitani]

Add support Pkl for configuration and register map format.

[taichi-ishitani]

Register map written in Pkl may be like below.

// rggen.pkl
module rggen
register_block {
  __type = "register_block"
}
register_file {
  __type = "register_file"
}
register {
  __type = "register"
}
bit_field {
  __type = "bit_field"
}

import "rggen.pkl"

register_block = (rggen.register_block) {
  name = "uart_csr"
  byte_size = 32

  (rggen.register) {
    name            = "rbr"
    offset_address  = 0x00
    type            = new { "indirect"; ["lcr.dlab"] = 0 }
    comment         = "Receiver Buffer Register"

    (rggen.bit_field) {
      bit_assignment  = new { lsb = 0; width = 8 }
      type            = "rotrg"
    }
  }
}