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How to support ADI (Arm Debug Interface) v5 in riscv? #1000

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coolwinner opened this issue Jan 22, 2024 · 8 comments
Open

How to support ADI (Arm Debug Interface) v5 in riscv? #1000

coolwinner opened this issue Jan 22, 2024 · 8 comments

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@coolwinner
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I checked the code, and I found it seems only MEM_AP is supported in the file mem_ap.c , but I can't find any files related with JTAG_AP.

Thanks!

@TommyMurphyTM1234
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TommyMurphyTM1234 commented Jan 22, 2024

Any use? Seems to have been an attempt to add JTAG_AP support.

But it seems to be still open after several years.

What exactly is the relevance of your query to RISC-V support?
Are there RISC-V implementations that use ADI (Arm Debug Interface) v5?

Maybe this is something that you need to raise on the upstream mailing lists or issue tracker?

@coolwinner
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Yes, the RISC-V implementation that use ADI (Arm Debug Interface) v5 is as below:

image

But openocd seems not support Dap in riscv target, could you give some suggestions?

Thanks!

@TommyMurphyTM1234
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Yes, the RISC-V implementation that use ADI (Arm Debug Interface) v5 is as below:

image

What is this RISC-V implementation?

@coolwinner
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Yes, the RISC-V implementation that use ADI (Arm Debug Interface) v5 is as below:
image

What is this RISC-V implementation?

Sorry, I am afraid you may misunderstand my mean. I mean our hardware design is as the image I shown in above comment, but we want to debug with openocd, it seems current openocd not support the design. So could you give me some suggestions about how to support the hardware design with openocd?

Thanks!

@coolwinner coolwinner changed the title Is AP_TYPE_JTAG_AP supported? How to support ADI (Arm Debug Interface) v5 in riscv? Jan 23, 2024
@TommyMurphyTM1234
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TommyMurphyTM1234 commented Jan 28, 2024

According to the OpenOCD documentation:

OpenOCD supports JTAG debug of RV32 and RV64 cores

There is no mention of any ADI support.

It might be worth asking this question in the upstream OpenOCD mailing lists?

How to support ADI (Arm Debug Interface) v5 in RISC-V

Edit: perhaps work of this nature is relevant to your question?

@zqb-all
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zqb-all commented Jun 5, 2024

hi @coolwinner ,has there been any progress on this issue so far ? It seems that JTAG-AP is completely without any support, and even though openocd has some support for MEM-AP, it will require further modifications to support RISC-V DM behind MEM-AP

@coolwinner
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hi @coolwinner ,has there been any progress on this issue so far ? It seems that JTAG-AP is completely without any support, and even though openocd has some support for MEM-AP, it will require further modifications to support RISC-V DM behind MEM-AP

Hi @zqb-all ,
We changed our design and no longer used JTAG-AP, and we are doing some modifications to support RISC-V DM behind MEM-AP.

@zqb-all
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zqb-all commented Jun 11, 2024

We changed our design and no longer used JTAG-AP, and we are doing some modifications to support RISC-V DM behind MEM-AP.

Got it. Thanks for your reply.

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