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and instead of pll_sys.get_freq() replace to HertzU32::MHz(248)?
If not, what is the correct mechanism to configure this? All help is appreciated.
Thanks
-Dmitri
The text was updated successfully, but these errors were encountered:
It's not exactly as simple, as the clock source passed to configure_clock must have a higher frequency than the target frequency. So if you want to overclock, what you need to do is increase the frequency of pll_sys.
Hi all,
I am looking at overclocking my sys_clk to speed up the pio state machines, at for example, 250 Mhz.
I am using the standard 12Mhz XOSC on board and want to either configure the SYS_PLL, or sys_clk at runtime.
I have the following:
in clocks/mod.rs the trait has ClocksManager and I wonder if i can simply do:
and instead of pll_sys.get_freq() replace to HertzU32::MHz(248)?
If not, what is the correct mechanism to configure this? All help is appreciated.
Thanks
-Dmitri
The text was updated successfully, but these errors were encountered: