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MMX/SSE related functions #1169

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41 of 60 tasks
Torinde opened this issue Mar 28, 2024 · 5 comments
Open
41 of 60 tasks

MMX/SSE related functions #1169

Torinde opened this issue Mar 28, 2024 · 5 comments
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instruction-set-support Implementing new SIMD ISA extensions portably

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@Torinde
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Torinde commented Mar 28, 2024

Per #1152 (comment) - listing those in case some of them are not yet implemented.

non-SIMD instructions related to:

MMX instructions introduced:

@mr-c mr-c added the instruction-set-support Implementing new SIMD ISA extensions portably label Mar 28, 2024
@mr-c
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mr-c commented Mar 28, 2024

Many of the rest are already implemented in SIMDe. I updated the table to add the intrinsic names next to the CPU instruction mnemonic.

@mr-c
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mr-c commented Mar 28, 2024

@Torinde Can you add the intrinsic/function name for the rest of the instructions? I'm seeing more of then as already implemented in SIMDe

Thanks for flagging these, we need to represent this status information better in our docs

@Torinde
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Torinde commented Mar 28, 2024

Can you add the intrinsic/function name for the rest of the instructions? I'm seeing more of then as already implemented in SIMDe

How do you check?

@mr-c
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mr-c commented Mar 28, 2024

Can you add the intrinsic/function name for the rest of the instructions? I'm seeing more of then as already implemented in SIMDe

How do you check?

  1. Go to https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#
  2. Search for the instruction name: https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=MASKMOVQ
  3. If there are multiple hits, check them for a matching Instruction: line: https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=MASKMOVQ&ig_expand=4253_mm_maskmove_si64
  4. Check SIMDe source for the intrinsic:

    simde/simde/x86/sse.h

    Lines 2922 to 2942 in 517da84

    SIMDE_FUNCTION_ATTRIBUTES
    void
    simde_mm_maskmove_si64 (simde__m64 a, simde__m64 mask, int8_t* mem_addr) {
    #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
    _mm_maskmove_si64(a, mask, HEDLEY_REINTERPRET_CAST(char*, mem_addr));
    #else
    simde__m64_private
    a_ = simde__m64_to_private(a),
    mask_ = simde__m64_to_private(mask);
    SIMDE_VECTORIZE
    for (size_t i = 0 ; i < (sizeof(a_.i8) / sizeof(a_.i8[0])) ; i++)
    if (mask_.i8[i] < 0)
    mem_addr[i] = a_.i8[i];
    #endif
    }
    #define simde_m_maskmovq(a, mask, mem_addr) simde_mm_maskmove_si64(a, mask, mem_addr)
    #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
    # define _mm_maskmove_si64(a, mask, mem_addr) simde_mm_maskmove_si64((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr)))
    # define _m_maskmovq(a, mask, mem_addr) simde_mm_maskmove_si64((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr)))
    #endif

Thanks!

@Torinde
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Torinde commented Mar 28, 2024

Done - remaining instructions I don't find in Intel intrinsics list.

Most are implemented, only 14 "related" ones aren't.

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