Repository for lab component of the course CS F215: Digital Design at BITS Pilani, Pilani campus (Fall '21)
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Updated
Dec 5, 2021
Repository for lab component of the course CS F215: Digital Design at BITS Pilani, Pilani campus (Fall '21)
Educational repo for storing my practice sessions with digital systems as well as solutions to online courses or university courses I take. These implementations are done in VHDL or Verilog.
A DDS peripheral for an Altera Cyclone V computer to produce sine waves and musical notes
Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method
A portfolio created using React demonstrating both solo and group projects
Basic digital designs developed with Verilog and VHDL.
Repository del corso di Architettura dei Sistemi Digitali della Laurea Magistrale in Ingegneria Informatica, tenuto dal prof N. Mazzocca durante l'anno accademico 2021-2022.
Course Project - Microprocessors - Spring Semester 2022 - Indian Institute of Technology Bombay
Contains assignments and projects done as part of course work during III Semester B.Tech
In this project-centered course* you will build a modern computer system, from the ground up. We’ll divide this fascinating journey into six hands-on projects that will take you from constructing elementary logic gates all the way through creating a fully functioning general purpose computer. In the process, you will learn - in the most direct a…
Using a linear feedback shift register (LFSR), design a pseudorandom binary sequence (PRBS) generator.
Repository for resolution of Nand2Tetris course.
parameterized CRC circuit design in verilog
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