RISC-V
Unlike most other ISA designs, the RISC-V ISA is provided under open source licenses that do not require fees to use. A number of companies are offering or have announced RISC-V hardware, open source operating systems with RISC-V support are available and the instruction set is supported in several popular software toolchains.
Notable features of the RISC-V ISA include a load–store architecture, bit patterns to simplify the multiplexers in a CPU, IEEE 754 floating-point, a design that is architecturally neutral, and placing most-significant bits at a fixed location to speed sign extension. The instruction set is designed for a wide range of uses. The base instruction set has a fixed length of 32-bit naturally aligned instructions, and the ISA supports variable length extensions where each instruction could be an any number of 16-bit parcels in length. Subsets support small embedded systems, personal computers, supercomputers with vector processors, and warehouse-scale 19 inch rack-mounted parallel computers.
Here are 838 public repositories matching this topic...
C++20 RISC-V RV32/64/128 userspace emulator library
-
Updated
May 20, 2024 - C++
✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
-
Updated
May 20, 2024 - Python
RISCV64 assembler with a powerful macro preprocessor
-
Updated
May 20, 2024 - C
Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
-
Updated
May 20, 2024 - C
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
-
Updated
May 20, 2024 - Scala
Fast RISC-V-based scripting backend for game engines
-
Updated
May 19, 2024 - C++
⭐ A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
-
Updated
May 19, 2024 - VHDL
Device support crate for WCH's CH32V MCUs: CH32V003, CH32V103, CH32V203, CH32V208, CH32V307, ...
-
Updated
May 19, 2024 - Rust
This is a book that explains driver development with Rust. It does so by procedurally creating a UART driver for a RISCV chip(an esp32c3)
-
Updated
May 19, 2024 - Rust