systemverilog
Here are 873 public repositories matching this topic...
🎓💻University of Tehran Computer Architecture Course Projects - Spring 2021
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Nov 20, 2021 - Verilog
Basics of Verilog implementation
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Aug 4, 2022 - SystemVerilog
Basic Stopwatch Design using Terasic DE-10 Standard FPGA
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Jul 30, 2022 - SystemVerilog
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Oct 1, 2023 - SystemVerilog
Here you'll find the game "Donkey Kong" written 100% in SysVerilog. You'll need an FPGA card, a screen, a keyboard, and audio devices for the full functionality.
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Apr 16, 2023 - SystemVerilog
Extending the MIPS32 Single Cycle Processor Instruction Set.
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Apr 11, 2023 - C
A single SystemVerilog package with both classes of half as well as full adder is created and tested using the testbench
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Oct 13, 2023 - SystemVerilog
Uvod u UVM verifikaciju, prepravljena hijerarhija i prekucani kodovi sa youtube snimka, osnovne akademske studije
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Jun 13, 2023 - SystemVerilog
FPGA implementation for UART interface for rx/tx data with support AXI-Stream protocol
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Dec 2, 2021 - SystemVerilog
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Mar 25, 2021 - SystemVerilog
8259/8259A-like Interrupt Controller written in SystemVerilog
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Nov 14, 2023 - SystemVerilog
This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, SystemVerilog, and SVA. The main objectives included designing modules compliant with industry standards such as APB (Advanced Peripheral Bus), memory systems, and systolic matrix multiplication.
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Apr 8, 2024 - Verilog
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Aug 15, 2019 - SystemVerilog
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