Assignments of Physical Design for Nanometer ICs

• Term: Spring 2017
• Lecturer: Prof. Yao-Wen Chang

HW1: Fiduccia-Mattheyses heuristic for Solving 2-Way, Balanced Partitioning

• Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning

HW2: B*-Tree with Fast-SA for Solving Fixed-Outline Floorplan Problem

• B*-Trees: A New Representation for Non-Slicing Floorplans
• Modern Floorplanning Based on Fast Simulated Annealing

HW3: Abacus-Based Legalizer for Solving Single-Cell Height Legalization

• Abacus: Fast legalization of standard cell circuits with minimal movement
• Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization

HW4: Steiner-Tree Construction

• Efficient Steiner Tree Construction Based on Spanning Graphs