GitHub - chenyangbing/UVM-example: UVM

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
agent.sv		agent.sv
driver.sv		driver.sv
env.sv		env.sv
interface.sv		interface.sv
memory.sv		memory.sv
monitor.sv		monitor.sv
scoreboard.sv		scoreboard.sv
seq_item.sv		seq_item.sv
sequence.sv		sequence.sv
sequencer.sv		sequencer.sv
test.sv		test.sv
top.sv		top.sv
wr_rd_test.sv		wr_rd_test.sv

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UVM

systemverilog uvm systemverilog-hdl

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