A Python based netlist parser, including Verilog and SPICE
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A set of Python based parsers for multiple file format used in IC chip design, including Verilog, SPICE, lib (Synopsys Liberty).
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jimwang99/parser-for-chip-design
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A set of Python based parsers for multiple file format used in IC chip design, including Verilog, SPICE, lib (Synopsys Liberty).
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