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[AArch64][GISEL] Reduce likelihood of hash collisions for mappings in RegisterBankInfo #87033

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Apr 2, 2024
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[AArch64][GISEL] Reduce likelihood of hash collisions for mappings in RegisterBankInfo #87033

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8 changes: 4 additions & 4 deletions llvm/include/llvm/CodeGen/RegisterBankInfo.h
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Original file line number Diff line number Diff line change
Expand Up @@ -399,22 +399,22 @@ class RegisterBankInfo {

/// Keep dynamically allocated PartialMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const PartialMapping>>
mutable DenseMap<hash_code, std::unique_ptr<const PartialMapping>>
MapOfPartialMappings;

/// Keep dynamically allocated ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const ValueMapping>>
mutable DenseMap<hash_code, std::unique_ptr<const ValueMapping>>
MapOfValueMappings;

/// Keep dynamically allocated array of ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<ValueMapping[]>>
mutable DenseMap<hash_code, std::unique_ptr<ValueMapping[]>>
MapOfOperandsMappings;

/// Keep dynamically allocated InstructionMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const InstructionMapping>>
mutable DenseMap<hash_code, std::unique_ptr<const InstructionMapping>>
MapOfInstructionMappings;

/// Getting the minimal register class of a physreg is expensive.
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