Compiler Engineer at QBayLogic B.V.
-
QBayLogic B.V.
- Enschede, Netherlands
- @ucallbyneed
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680 contributions in the last year
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Activity overview
Contributed to
bittide/bittide-hardware,
clash-lang/clash-compiler,
clash-lang/clash-vexriscv
and 25 other
repositories
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Contribution activity
April 2025
Created 20 commits in 3 repositories
Created a pull request in clash-lang/clash-compiler that received 8 comments
Strip ticks for literal parsing in TermLiteral
Note that the other instances are fine, because they use collectArgs
.
Still TODO:
Write a changelog entry (see changelog/README.md)
Check copyri…
+5
−1
lines changed
•
8
comments
Opened 7 other pull requests in 3 repositories
clash-lang/clash-compiler
1
open
3
merged
1
closed
-
Add support for GHC 9.12
This contribution was made on Apr 19
-
Remove
clash-cores
This contribution was made on Apr 2 -
Inline global binders in
termToData
This contribution was made on Apr 2 -
Allow compilation on GHC 9.6.7
This contribution was made on Apr 2
-
Use
True
/False
inclash-ffi.cabal
This contribution was made on Apr 2
bittide/bittide-hardware
1
merged
-
Use Nix flakes
This contribution was made on Apr 3
clash-lang/clash-cores
1
merged
-
Add
instWithXilinxWizard
This contribution was made on Apr 1
Reviewed 11 pull requests in 3 repositories
clash-lang/clash-compiler
5 pull requests
-
Add
Clash.Class.Convert
This contribution was made on Apr 21 -
Test 9.10 on macOS, add to README
This contribution was made on Apr 20
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Add Vivado SystemVerilog to CI
This contribution was made on Apr 11
-
Inline global binders in
termToData
This contribution was made on Apr 2 -
Allow compilation on GHC 9.6.7
This contribution was made on Apr 2
bittide/bittide-hardware
4 pull requests
-
Output SDPE state for debugging, and change garbage data value to identify FPGAs uniquely.
This contribution was made on Apr 5
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Fix handling of ILA data directories with spaces in them
This contribution was made on Apr 5
-
Move local counter to circuit inputs, change default counter vals.
This contribution was made on Apr 3
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Make instr/data ILAs conditional for processing elements.
This contribution was made on Apr 2
clash-lang/clash-cores
2 pull requests
-
Re-add
gmiiToSgmiiBridge
after migrationThis contribution was made on Apr 11 -
Add regression test for issue 2781
This contribution was made on Apr 5
Created an issue in clash-lang/clash-compiler that received 2 comments
Add SaturatingNum (Signal dom a)
We have Num (Signal dom a)
. For consistency, we should have SaturatingNum (Signal dom a)
. We've seen confusion when:
1 + s
couldn't be rewritten to:
2
comments
Opened 13 other issues in 2 repositories
bittide/bittide-hardware
8
open
-
Add unscheduled, arbitrary communication between MUs
This contribution was made on Apr 10
-
Add unscheduled, node discovery between MUs
This contribution was made on Apr 10
-
Write switch calendars over Wishbone
This contribution was made on Apr 10
-
Replace
switchDemoPe
with RISC-V CPUThis contribution was made on Apr 10 -
Switch to upstream version of OpenOCD / Debug module
This contribution was made on Apr 1
-
Exhaustively collect clock control data
This contribution was made on Apr 1
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Refactor/simplify clock control to store results in non-ILA destination
This contribution was made on Apr 1
-
Add 2-domain AXI4 Xilinx FIFO
This contribution was made on Apr 1
clash-lang/clash-compiler
3
open
2
closed
-
Add
[TickInfo]
to constructors ofTerm
This contribution was made on Apr 6 -
TermLiteral
doesn't strip ticksThis contribution was made on Apr 6 -
Is the
Clash.Class
hierarchy necessary?This contribution was made on Apr 2 -
Warning: clash-ffi.cabal:121:21: Boolean values are case sensitive, use 'True' or 'False'
This contribution was made on Apr 1
-
Clash doesn't build on GHC 9.6.7 (but does on 9.6.6)
This contribution was made on Apr 1