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Merge pull request #7 from harrysarson/prep-release
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Prep release v0.3.1
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harrysarson committed Apr 1, 2019
2 parents becfd7c + a4a14bc commit 20aa2b4
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3 changes: 0 additions & 3 deletions .travis.yml
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Expand Up @@ -3,11 +3,8 @@ language: rust
rust:
- stable
- beta
- nightly

matrix:
allow_failures:
- rust: nightly
fast_finish: true

cache:
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3 changes: 2 additions & 1 deletion CHANGELOG.md
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@@ -1,8 +1,9 @@
# Changelog

## [0.4.0] - unreleased
## [0.3.1] - unreleased

- Use cargo workspaces to organise `narvie`'s crates.
- Use Travis CI to build distributable binaries.

## [0.3.0] - 2019-03-29

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7 changes: 5 additions & 2 deletions README.md
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Expand Up @@ -6,8 +6,11 @@ Only UNIX systems have been tested.

## Installation

* [Download Rustup and install Rust](https://www.rust-lang.org/tools/install).
* Run `$ cargo install narvie-cli`.
Either [download a pre-built narvie binary (ubuntu linux)](https://github.com/physical-computation/narvie/releases/latest/download/narvie-cli) or build using cargo:

1. [Download Rustup and install Rust](https://www.rust-lang.org/tools/install).
2. [Install verilator](https://www.veripool.org/projects/verilator/wiki/Installing). Version 3.916 is recommended.
3. Run `$ cargo install narvie-cli`.

## Running

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4 changes: 2 additions & 2 deletions processor/build.rs
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Expand Up @@ -29,10 +29,10 @@ verilator \
--cc $VERILATOR_SRC/top_sim.v $MODULES $SAIL/config.vlt \
-I$UART_RX \
--prefix Vnarvie \
--cc $VERILATOR_SRC/main.c $VERILATOR_SRC/testbench.c $VERILATOR_SRC/uartsim.c \
--cc $VERILATOR_SRC/main.cpp $VERILATOR_SRC/testbench.cpp $VERILATOR_SRC/uartsim.cpp \
--exe \
-Mdir $OUT_DIR \
-CFLAGS "-std=c++11 -g -O3 -fPIC"
-CFLAGS "-std=c++11 -g -O3 -fPIC -Wall -Werror"
make -j -f Vnarvie.mk
cp Vnarvie__ALL.a libvnarvie.a
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Expand Up @@ -17,7 +17,7 @@ void NarvieSimulator_init(NarvieSimulator *simulator, Vnarvie *core, UartSimulat
simulator->txStart = 0;
}

int NarvieSimulator_tick(NarvieSimulator *simulator)
void NarvieSimulator_tick(NarvieSimulator *simulator)
{
simulator->core->rx = UartSimulator_tick(simulator->uart, simulator->core->tx);

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2 changes: 1 addition & 1 deletion processor/simulator-src/testbench.h
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Expand Up @@ -27,7 +27,7 @@ extern "C"
} NarvieSimulator;

void NarvieSimulator_init(NarvieSimulator *simulator, Vnarvie *core, UartSimulator *uart);
int NarvieSimulator_tick(NarvieSimulator *simulator);
void NarvieSimulator_tick(NarvieSimulator *simulator);
void main_loop(int (*write)(uint8_t, void *), int (*try_read)(uint8_t *, void *), void *read_write_state);

#ifdef __cplusplus
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Expand Up @@ -25,7 +25,7 @@ void UartSimulator_init(UartSimulator *simulator, int (*write)(uint8_t, void *),

int UartSimulator_tick(UartSimulator *simulator, int i_tx)
{
int o_rx = 1, nr = 0;
int o_rx = 1;

if ((!i_tx) && (simulator->last_tx))
simulator->rx_changectr = 0;
Expand Down Expand Up @@ -85,9 +85,7 @@ int UartSimulator_tick(UartSimulator *simulator, int i_tx)
uint8_t buf;
if (simulator->try_read(&buf, simulator->read_write_state) == 0)
{
simulator->tx_data = (-1 << (8 + 0 + 1))
// << nstart_bits
| ((buf << 1) & 0x01fe);
simulator->tx_data = ~0 | (buf << 1);
simulator->tx_busy = (1 << (8 + 0 + 1 + 1)) - 1;
simulator->tx_state = TXDATA;
o_rx = 0;
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3 changes: 0 additions & 3 deletions src/main.rs

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