Pinned

1. Dadda-Multiplier-using-CSA Dadda-Multiplier-using-CSA Public

   Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.

   Verilog 32 6

2. RISC-V-32I-based-core-with-Advanced-Extensible-Interface RISC-V-32I-based-core-with-Advanced-Extensible-Interface Public

   5 stage pipelined RISC-V core with AXI3 bus protocol between the directly mapped cache and main memory.

   Verilog 9 1

3. sobel-edge-detector sobel-edge-detector Public

   Sobel is first order or gradient based edge operator for images and it is implemented using verilog.

   Verilog 14 5

4. Speaker-recognition Speaker-recognition Public

   An automatic speaker recognition system built from digital signal processing tools, Vector Quantization and LBG algorithm

   MATLAB 10 5

5. Multi-operations-toolbox-with-baugh-wooley-multiplier Multi-operations-toolbox-with-baugh-wooley-multiplier Public

   Given A and B are 64-bit inputs. With two selection lines s1 and s0 to perform the operations, A+B, A-B, AB, C+AB using Baugh Wooley multiplier

   Verilog 9 1

6. Parallel-Cordic Parallel-Cordic Public

   Verilog 5 2