Plasma MIPS (I) SoC
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Updated
Sep 17, 2018 - C
Plasma MIPS (I) SoC
A collection of formal properties for hardware buses, and cores using them.
Trying to implement a soft core SoC
A collection of nMigen examples based on the OpenCores WISHBONE Tutorial https://cdn.opencores.org/downloads/wbspec_b4.pdf#page=91
Versatile Functional Bus Description Language compiler back-end written in Go.
Forth CPU J1 in SystemVerilog and Wishbone interface
A wishbone controlled FM transmitter hack
A System on a Chip Implementation for the XuLA2-LX25 board
Um pequeno processador RISC-V de 32 bits desenvolvido com a linguagem de descrição VHDL.
Trying to learn Wishbone by implementing few master/slave devices
A collection of debugging busses developed and presented at zipcpu.com
RISC-V Ibex core with Wishbone B4 interface
A wishbone controlled scope for FPGA's
Wishbone controlled I2C controllers
A utility for Composing FPGA designs from Peripherals
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