Pinned

1. Parallel-Programming Parallel-Programming Public

   ECE 563 Course at PURDUE.

   C

2. GPU GPU Public

   ECE 695 Course at Purdue (CUDA)

   C++ 1

3. AES128 AES128 Public

   Hardware Accelerator for AES 128-bit Encryption and Decryption implemented (in Verilog) in Altera's FPGA board.

   Verilog 11 3

4. CRC32 CRC32 Public

   32-bit CRC Hardware Accelerator and Custom Instructions implemented (in Verilog) in Altera's FPGA board.

   C 7 1

5. SAT-solver SAT-solver Public

   The SAT solver checks if the given CNF formula evaluates to true for some arbitrary input combinations.

   C++ 1