CUGR, VLSI Global Routing Tool Developed by CUHK
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Updated
Feb 27, 2023 - C++
CUGR, VLSI Global Routing Tool Developed by CUHK
RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
Physical Design Flow from RTL to GDS using Opensource tools.
Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian
EDA physical synthesis optimization kit
Create fast and efficient standard cell based adders, multipliers and multiply-adders.
Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization
Routing Visualization for Physical Design
RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
generic NetList data structure for VLSI
This repository contains all the information included in the beginner SoC/physical design using open-source EDA tools organized by VLSI System Design Corporation. This workshop helped me gain hands-on experience with tools that are used in the physical design flow.
Source files for the labs of the Microelectronic Systems course
Design & Synthesis of several digital circuits in VHDL and Verilog. Scripting in TCL, simulation with Intel® ModelSim®, and synthesis under Synopsys® DC Ultra™.
Design, layout, and simulation files of the paper "Atomic Defect-Aware Physical Design of Silicon Dangling Bond Logic on the H-Si(100)-2×1 Surface" by M. Walter, J. Croshaw, S. S. H. Ng, K. Walus, R. Wolkow, and R. Wille in DATE 2024.
Contains the all the assignments of CMOS ASIC Design Lab
PrUcess is a low-power multi-clock configurable digital processing system that executes commands (unsigned arithmetic operations, logical operations, register file read & write operations) which are received from an external source through UART receiver module and it transmits the commands' results through the UART transmitter module.
Creating this repo to document the learnings from the workshop Advanced Physical Design using OpenLANE/SKY130 conducted by VSD
MNT Bench - An MNT tool for Benchmarking FCN circuits
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